~~NOTOC~~
====== IOSERDES Data Analysis =====


===== Notes ===== 
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  * Unless otherwise mentioned, the data comes from **FuncMon logs**. 
  * Both **"low-speed" (2.083 MHz) and "high-speed" (33.333 MHz)** tests.  
  * **Full visibility (32-bit word)** on the 56 FuncMon internal error counters. 
  * **Pattern** (from Bob's documentation and confirmed in FuncMon's VHDL): **10101100**.


===== Analysis pages/sections =====
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  * **[[data_analysis:v7-dynamic:201703-tamu:ioserdes:0-raw | Data previous to processing.]]** Here are the preliminary plots showing the strange accumulated delta-count features, similar to the HSTL and LVCMOS(3V3) tests. 

  * **[[data_analysis:v7-dynamic:201703-tamu:ioserdes:weibull_fits | Weibull fits for (Krysten's) cross-sections data points.]]** Obtained by Bill Rowe. 

  * **[[data_analysis:v7-dynamic:201703-tamu:ioserdes:1-processed | Processed data.]]** Preliminary plots of the runs, as processed by (Sebas') python code and posterior manual counting of events. 


